1. Field of the Invention
The present invention relates to transmission of a clock signal.
2. Description of Related Art
Clocking is widely used in integrated circuits. A clock signal is usually a square wave. In integrated circuits, a clock signal is usually derived from a crystal oscillator, and then transmitted to various parts of the integrated circuits. Therefore, efficient clock transmission is typically needed. FIG. 1 depicts a schematic diagram of a typical clock transmission circuit 100. Circuit 100 comprises: an NMOS (n-channel metal-oxide semiconductor field effect) transistor 110 for receiving a source clock signal CLK_SRC and outputting a current signal ICLK, a transmission line 120 for receiving the current signal ICLK on a first end 121 and transmitting the current signal ICLK to a second end 122; and a termination device 130 embodied as a resistor 130 for coupling to the second end 122 of the transmission line 120, thereby resulting in a destination clock CLK_DES. Throughout this disclosure, VDD denotes a power supply node. In integrated circuits, however, there are usually many coexisting circuits and signals. The transmission line 120, while transmitting the current signal ICLK, may pick up noise from nearby circuits and signals that may degrade the quality of the clock signal. To ensure good quality of the destination clock CLK_DES, the amplitude of the current signal ICLK should be relatively large while the impedance of the termination device 130 should be kept relatively small. However, this typically increases power consumption.
A need therefore exists for a clock transmission method that ensures a good signal quality at the destination without large power consumption.